| DIGITAL DELAY INSERTION |
PROGRESSIVE DIGITAL DELAY INSERTIONTable Of Contents
1. Requirements1.1 IntroductionPDDI ( progressive digital delay insertion ) is a digital audio device to manipulate the delay between words or silent period in a song. Delay can be progressively inserted or removed by using PDDI. The graph below shows the basic operation of PDDI.
The application of PDDI includes:
1.2 Objectives1.3 Background Theory1.3.1 Minimum Sampling RateOur design is mainly aiming for speech related delay insertion, the sampling rate is chosen as 8k Hz. Because the power spectrum density of human speech is concentrated below 4 k Hz bandwidth, 8 k Hz sampling rate should be sufficient to retain the speech quality. Also such sampling rate is defined by ITU-T ( former CCITT ) for toll quality telephony network. 1.3.2 Silence Window and ThresholdThreshold level is used to tell silence from active sound. In practical case, this is very hard to determine. The overall sound level is really controlled by the pre-amp. Therefore so as the absolute noise level. Also under different situations, the background noise level could be different. However, we can still find some meaningful value by setting everything to studio condition and measure the noise level. Here is a plot of a short conversation from radio:
The noise level above is
The threshold level for the above is 3/128 . For a 16 bits A/D, threshold will be : 32768*3/128 = 768. This way of distinguish active sound from silence is not robust as it is not able to identify strong background noise such as street noise. The most sophisticated way is to use a similar algorithm to VAD ( voice activity detection ) used in GSM. It will remove the strong background noise caused by vehicle, street noise etc by using autocorrelation method and long term filter. However, it is too complicated to implement. Silence window is used to determine whether it is a low sound pressure level syllabus or a real pause between words. From speech processing literature, within a frame of 10msec to 40 msec, the speech signal is usually stationary. Therefore, we can say that if it is a low sound level syllabus, it should be within 10 m sec. The silence window can be derived that if it is silence, it should be longer than 40 msec. With sampling rate is 8000 samples / sec, 10 msec * 8000 = 80. 1.3.3 Maximum DelayThe total delay time can be inserted is limited by the amount memory we can access. In our case, the total memory size is about 8 k. Therefore, the delay time will be: 8 K / 8 K = 1 sec. By using a lower sampling rate to say about 6k samples/sec, we can get 8 / 6 = 1.33 sec. 1.4 Dataflow Diagram1.4.1 DFD
1.4.2 Data DictionaryISample = word * Sampled analogue speech input signal * OSample = word * Samples to be written to D/A chip * WinSize = word * To count the number of samples below threshold * MaxWin = constant * To compare with WindowSize for silence detection * UserSel = [Normal | Delay Insertion | Buffer Reset] UserInput = word * Choice of UserSelection by user * UserTmp = word * The character transmitted via RS232 * receive = word * The character echoed back from C50 * WinDiff = word * The difference between MaxWin and WinSize * NumSample = word * The number of delay samples C50 has to send * 2. Design2.1 Block Diagram
2.2 Structure Chart
2.3 Possible Implementation ProblemsThe biggest obstacle is the PC - C50 communication. Although the basic operation was demonstrated and well understood, we still don't know whether the increase of the code complexity and with RINT interrupt operating will upset the INT2 ISR. Also we intend to test PDDI using a microphone. In this case, the noise threshold could be much higher than the one from the radio broadcast program. This has to be solved by trial and error. 2.4 ReferencesKen C. Pohlmann, "Principles of Digital Audio", Howard W. Sams & Co., Inc., Indiana, USA, 1985. Talbot - Smith, M., "Audio Engineer's Reference Book", Butterworth-Heinemann Ltd, Great Britain, 1994. K. Blait Benson, " Audio Engineering Handbook", NewYork, McGraw-Hill, 1988 Luc Baert, "Digital Audio and Compact Disc Technology", Boston, Focal Press, 1995. 3. Implementation3.1 TestingThe testing was done in the following two steps: 3.1.1 Test the program using FG and CROFor the normal operation, the input signal is same as the output signal plus some time lagging caused by previous delay insertion. For the delay insertion operation, the input signal used is a DC shifted square wave with half cycle longer than silence window. The negative half cycle of the wave form is close to zero. The expected output signal should be a square wave with twice of the zero half cycle.
The test confirmed that the negative half cycle was almost doubled. For buffer reset, after the user has pressed the button, any time delay caused by insertion should disappear and PDDI should go back to normal mode. 3.1.2 Test the program using microphone and speakerThe PC, C50, microphone and speaker are connected as below,
We also monitor the output of the pre amp and the output of the DSK using the CRO. Firstly we tested it using normal mode. No delay could be heard from the speaker. Then we changed it to delay insertion mode. By listening the time difference between our own voice and the sound replayed by the powered loud speaker, we can tell that delay is gradually inserted. At the maximum delay, the time difference is approximately one second. Also from the CRO, we can see the inserted signal because it is zero voltage dc. Finally we used circular buffer reset. After reset, there was no time delay heard and it went back to normal mode as expected. As summary, the testing showed that the program was working and our prediction was correct. 3.2 Bench Mark and OptimizationThe purpose of bench mark and optimisation is mainly to see how fast these subroutines are and so to derive how fast the sampling rate can be with this set of code. The bench mark is done only on A/D interrupt service routine related code. INT2 related code is unimportant while the program is running. Although INT2 ISR will slow down the execution greatly when it is invoked, it is not continuos. As there are quite a few branches in the code, only the worst case ( the code executed for the longest time ) is evaluated. In our case, the longest one is as follows;
The longest path in Window routine takes 21 cycles. There is one optimisation that can be made which is to use delay RETD instead of RET. It saves 2 cycles. Other branches can not be modified to delay ones as the branch only depend on the previous instruction. The longest path in ModeSel routine takes 13 cycles. There is no optimisation that can be made. The longest path in DelayI takes 20 cycles. There is no optimisation that can be made. The longest path in SSample takes 23 cycles. The modification can be made on the RET. It saves 2 cycles. Finally in RxSamp ISR, it is same for all conditions which takes 18 cycles. Overall without optimisation, the longest path takes 95 cycles. The maximum time is 95 * 50 nsec = 4750 nsec. The maximum sampling rate therefore is 210526 sample / sec. It is way higher than the maximum sampling rate the starter's kit can handle. After optimisation, the longest path takes 91 cycles, the maximum sampling rate is 219780. One thing need to notice is that even without any optimisation, the code execution time is more than enough. Therefore it hasn't been our primary concern. Finally with regarding to the overall code structure, it looks like with less CALLs and RETs the program should run much faster. However strange problems caused by INT2 forced us to use this program structure. The truth is that when the code within one subroutine is too long or branching too far, the program will crash. This program structure we adopted was the only one that wouldn't crash. 3.3 Problems Encountered and how to overcome themThe problems are mainly associated with INT2 operation. When PC sends a byte to C50 and causes an INT2 interrupt, the C50 program crashes. Although we still don't fully understand why it crashes under some situation, we were able to solve the problem by a lot of trial and error. The problem can be best described as a four tears problem. Firstly, we had a lot of problems to find out how to send a byte to C50 and receive one byte while not using the kernel communication program. We solved the problem by writing another function called outbyte and inbyte. It works with the sample program CHARECHO.ASM. We continued to add code related to RINT ISR into the program, but it didn't work. We realised that with the code we have, with RINT and INT2 both operating, the program always crashes. We tried to overcome the problem by polling RINT and using INT2 interrupt. It didn't work. We also tried polling both RINT and INT2, it worked. Actually it resulted the LAB4 we had. We thought that the problems were solved and continued on the project by adding more code. When the code grew in size, the program started to crash again. With the help from our tutor, we recognised that the problem was that after INT2 ISR, the IFR flag should be reset to clear the interrupt. A small program was used to test the thought and it worked. We were rather confident that the key problem was identified and there shouldn't be more trouble ahead. Finally, when we put the full working code into the program, it crashed again. It could be seen that the crash was caused by code size and branching range. By trial and error, we reduced the code size in each subroutine and increase the number of called functions. The final working program works perfectly. However, in some subroutine, if one more NOP is added, it will crash. We still don't know the exact cause. During all those attempts, we also evaluated the possibility of using source reload. Every time the user changes the mode, the program will reload the DSK code and restart the C50. It worked and the reloading process takes about 1 second. Because our project has to run in real time, this method was abandoned after all. 3.4 Further Improvement
3.5 ConclusionThe PDDI implemented using C50 Starter's kit is working as we designed. Because the way it was designed and coded, there is no trouble what so ever for real time operation. Further improvement as mentioned above can be done with more time and enough hardware support. With minor modification, this can be marketed and commercialised. 3.6 ReferenceBorland C++ Programmer's Guide Borland C++ User's Guide TMS320C5X User's Guide 3.7 Declaration3.7.1 AcknowledgmentThe core programs are written by the group (Louis Selvon and Bill Zeng). Some supporting subroutines are adopted and modified to suit the needs. The C50 assembly codes adopted are
The C50 assembly code adopted and modified is
The host library is rewritten to ease the use. The main procedures are kept as they are with structure changes only. Also two other functions are added to interface with ReadByte and SendByte. For more detail, please refer to the document on C50host. AppendixA C50 assembly code list
B C++ host code list
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PDDI ( progressive digital delay insertion ) is a digital audio device to manipulate the delay between words or silent period in a song. Delay can be progressively inserted or removed by using PDDI. To give you an idea of PDDI we'll mention snippet so you get an idea what PDDI is all about. But first you can expect our site reveals information about first processing signal a great resource with analog to dv converter that is beyond what you can imagine information provided on insert delay . Let's get started.
The application of PDDI includes:
Our design is mainly aiming for speech related delay insertion, the sampling rate is chosen as 8k Hz. Because the power spectrum density of human speech is concentrated below 4 k Hz bandwidth, 8 k Hz sampling rate should be sufficient to retain the speech quality. Also such sampling rate is defined by ITU-T ( former CCITT ) for toll quality telephony network. So you'll be sure to learn from the site definetely delivers a resource insert delay with an excellent topic on first processing signal that sure will water your eyes the topic on analog to dv converter . Threshold level is used to tell silence from active sound. In practical case, this is very hard to determine. The overall sound level is really controlled by the pre-amp. Therefore so as the absolute noise level. Also under different situations, the background noise level could be different. However, we can still find some meaningful value by setting everything to studio condition and measure the noise level.
This way of distinguish active sound from silence is not robust as it is not able to identify strong background noise such as street noise. The most sophisticated way is to use a similar algorithm to VAD ( voice activity detection ) used in GSM. It will remove the strong background noise caused by vehicle, street noise etc by using autocorrelation method and long term filter. However, it is too complicated to implement. Our site's content on PDDI so far gives wealth from a top notch topic on signal processing system providing a magnificent topic on analog and digital signal that sure will water your eyes the topic on delay insertion . Silence window is used to determine whether it is a low sound pressure level syllabus or a real pause between words. From speech processing literature, within a frame of 10msec to 40 msec, the speech signal is usually stationary. Therefore, we can say that if it is a low sound level syllabus, it should be within 10 m sec.
The silence window can be derived that if it is silence, it should be longer than 40 msec. With sampling rate is 8000 samples / sec, 10 msec * 8000 = 80. Other topic provides the wealth of knowledge so you can expect our site reveals information about analog and digital signal a great resource with delay insertion that is as good as it gets with information on signal processing system . The total delay time can be inserted is limited by the amount memory we can access. In our case, the total memory size is about 8 k. Therefore, the delay time will be:
8 K / 8 K = 1 sec..
By using a lower sampling rate to say about 6k samples/sec, we can get 8 / 6 = 1.33 sec. The biggest obstacle is the PC - C50 communication. Although the basic operation was demonstrated and well understood, we still don't know whether the increase of the code complexity and with RINT interrupt operating will upset the INT2 ISR. So you can expect our site reveals information about delay insertion with an excellent topic on signal processing system that will blow your mind on analog and digital signal . Also we intend to test PDDI using a microphone. In this case, the noise threshold could be much higher than the one from the radio broadcast program. This has to be solved by trial and error.
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The test confirmed that the negative half cycle was almost doubled. For buffer reset, after the user has pressed the button, any time delay caused by insertion should disappear and PDDI should go back to normal mode. You'll get a breadth of knowlegde from you will learn about analog to dv converter a great resource with insert delay that is beyond what you can imagine information provided on first processing signal . We also monitor the output of the pre amp and the output of the DSK using the CRO.
Firstly we tested it using normal mode. No delay could be heard from the speaker. Then we changed it to delay insertion mode. By listening the time difference between our own voice and the sound replayed by the powered loud speaker, we can tell that delay is gradually inserted. At the maximum delay, the time difference is approximately one second. Also from the CRO, we can see the inserted signal because it is zero voltage dc. Have we grabbed your attention yet. We'll don't you want knowledge from you will learn about insert delay with a state of the art resource on first processing signal that will blow your mind on analog to dv converter . Finally we used circular buffer reset. After reset, there was no time delay heard and it went back to normal mode as expected.
As summary, the testing showed that the program was working and our prediction was correct. >The purpose of bench mark and optimisation is mainly to see how fast these subroutines are and so to derive how fast the sampling rate can be with this set of code. The bench mark is done only on A/D interrupt service routine related code. INT2 related code is unimportant while the program is running. Although INT2 ISR will slow down the execution greatly when it is invoked, it is not continuos. Now we really must have your attention. You'll sure will expect the site definetely delivers a resource signal processing system with a state of the art resource on analog and digital signal that sure will water your eyes the topic on delay insertion . As there are quite a few branches in the code, only the worst case ( the code executed for the longest time ) is evaluated. In our case, the longest one is as follows;
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